I am Wenbo Guo (郭文博). I received my Ph.D. from the School of Integrated Circuits, Tsinghua University (SIC THU, 清华大学集成电路学院), in 2025. I am currently a postdoctoral researcher at the College of Computer Science and Artificial Intelligence, Fudan University (复旦大学计算与智能创新学院), under the supervision of Yunlei Zhao (赵运磊).

My research interests include computer architecture, cryptographic hardware, post-quantum cryptography (PQC), digital integrated circuit (IC) design, side-channel security, and fully homomorphic encryption (FHE). My work has appeared in IEEE and ACM journals and at international conferences.

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🔥 News

• 2026.09: 🎉 Four post-quantum cryptographic algorithms (OPS-DSA, BW-KEM, DTRU-KEM, and AFS-KEX) were selected for the first round of NGCC. See security analyses and updates.

📝 Publications

• [C] ESORICS 2026 Hengchuan Zou, Songlin Li, Jieyu Zheng, Xiaowen Hu, Hanyu Wei, Weizhi Ao, Yifan Dong, Wenbo Guo, and Yunlei Zhao, “DTRU: A Versatile, Compact, Simple, and Robust NTRU KEM with Double E_8 Encoding,” in ESORICS 2026.

• [J] ACM TACO Hanyu Wei, Wenqian Li, Shiyu Shen, Hao Yang, Wenbo Guo, and Yunlei Zhao, “Vectorized SVE2 Optimization of the Post-Quantum Signature ML-DSA on ARMv9-A Architecture,” in ACM Transactions on Architecture and Code Optimization.

• [Preprint] arXiv W. Guo, “High-Speed (7, 2) Compressor Using A Fast Carry-Generation Logic based on Sorting Network,” arXiv:2309.03643, 2023.

• [J] IEEE TC W. Guo and S. Li, “Split-Radix based Compact Hardware Architecture for CRYSTALS-Kyber,” in IEEE Transactions on Computers, doi: 10.1109/TC.2023.3320040.

• [J] IEEE TCAS-I W. Guo and S. Li, “Highly-Efficient Hardware Architecture for CRYSTALS-Kyber With a Novel Conflict-Free Memory Access Pattern,” in IEEE Transactions on Circuits and Systems I: Regular Papers, doi: 10.1109/TCSI.2023.3306347.

• [J] IEEE TCAS-II W. Guo, S. Li, and L. Kong, “An Efficient Implementation of KYBER,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 3, pp. 1562–1566, March 2022, doi: 10.1109/TCSII.2021.3103184.

• [C] IEEE ISCAS 2021 W. Guo and S. Li, “Area-Efficient Modular Reduction Structure and Memory Access Scheme for NTT,” in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, 2021, pp. 1–5, doi: 10.1109/ISCAS51556.2021.9401571.

• [J] IEEE TVLSI W. Guo and S. Li, “Fast Binary Counters and Compressors Generated by Sorting Network,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 6, pp. 1220–1230, June 2021, doi: 10.1109/TVLSI.2021.3067010.

🛠️ Projects

• Contributed to the NGCC project.

🤝 Professional Service

Journal Reviewer

• IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)
• IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II)

📫 Contact Information

• Email: guowenbo@fudan.edu.cn
• Address: Room A7019, No. 2 Interdisciplinary Research Building, Jiangwan Campus, Fudan University, Shanghai, China.
• ORCID: 0000-0003-3204-7236